Design of high-accuracy CMOS oversampling current sample/hold (S/H) circuits

This paper presents a CMOS oversampling current sample/hold (S/H) circuit using feedforward approach. The circuit adopts an integrating feedback structure which reduces the possible errors of the current copier used to sample the input current, due to clock feedthrough, channel-length modulation and capacitive feedback. The feedforward significantly reduces the output swing of the integrator and thus improve the stability and accuracy of the circuit. As a result, high accuracy is obtained with only first-order integration and a low oversampling ratio, and the useful bandwidth is enlarged. Simulation results show a 90 dB signal-to-distortion ratio, which is more than 20 dB improvement over a simple current copier, where the SCDN20 2 μm CMOS process and 3.3 V supply voltage are assumed