Abstract :
The following topics are dealt with: high level design validation; SoC verification; formal verification; system-on-chip; silicon validation; silicon debugging; functional testing; functional verification; circuit simulation; SoC power management.
Keywords :
high level synthesis; integrated circuit design; integrated circuit testing; logic testing; system-on-chip; SoC power management; SoC verification; circuit simulation; formal verification; functional testing; functional verification; high level design validation; silicon debugging; silicon validation; system-on-chip;
Conference_Titel :
High Level Design Validation and Test Workshop, 2008. HLDVT '08. IEEE International
Conference_Location :
Incline Village, NV
Print_ISBN :
978-1-4244-2922-6
DOI :
10.1109/HLDVT.2008.4695858
