Issues in chip-package codesign with MCM-D/flip-chip technology

Author

Franzon, Paul ; Schaffer, Toby ; Lipa, Steve ; Glaser, Alan

Author_Institution

Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA

fYear

1998

Firstpage

88

Lastpage

92

Abstract

By distributing on-chip global power, ground, and clock planes on a thin film MCM, the IC can be made smaller, faster, and less noisy while consuming less power. These advantages are demonstrated by a number of case studies: two demonstrator ICs and an analysis of the DEC Alpha 21264 clock distribution scheme. However, there are a number of practical issues that need to be addressed, including process variations and test. In this paper, we present the case studies and a treatment of these practical issues

Keywords

clocks; flip-chip devices; integrated circuit design; integrated circuit packaging; integrated circuit testing; multichip modules; DEC Alpha 21264 clock distribution scheme; IC noise; IC power consumption; IC size; IC speed; MCM-D/flip-chip technology; chip-package codesign; demonstrator ICs; on-chip global clock planes; on-chip global ground planes; on-chip global power planes; process variations; testing; thin film MCM; CMOS technology; Clocks; Logic testing; Monitoring; Noise generators; Statistical analysis; Switches; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

IC/Package Design Integration, 1998. Proceedings. 1998 IEEE Symposium on

Conference_Location

Santa Cruz, CA

Print_ISBN

0-8186-8433-X

Type

conf

DOI

10.1109/IPDI.1998.663634

Filename

663634