DocumentCode
1625879
Title
Sampling rate conversion by Fourier interpolation
Author
Inoue, Manabu ; Kobayashi, Fuminori ; Watanabe, Minoru
Author_Institution
Kyushu Inst. of Technol., Fukuoka, Japan
Volume
2
fYear
2004
Firstpage
1613
Abstract
New time-domain SRC using Fourier interpolation to achieve less gate count than in frequency domain is proposed and implemented by FPGA. Layout area of the proposed SRC based on a 0.35/spl mu/m process is 5.728mm/sup 2/, smaller than the conventional SRC using filters. The noise level is reduced down to the quantization error level by using several improving methods.
Keywords
Fourier series; audio signal processing; discrete Fourier transforms; field programmable gate arrays; frequency-domain analysis; interpolation; quantisation (signal); sampling methods; time-domain analysis; 0.35 micron; FPGA; Fourier interpolation; digital audio; frequency domain; noise level; quantization error level; sampling rate conversion; time-domain SRC;
fLanguage
English
Publisher
ieee
Conference_Titel
SICE 2004 Annual Conference
Conference_Location
Sapporo
Print_ISBN
4-907764-22-7
Type
conf
Filename
1491686
Link To Document