Title :
Applications of decorator and observer design patterns in functional verification
Author_Institution :
Netronome Syst. Inc., San Jose, CA
Abstract :
This paper explores the applications of decorator and observer design patterns in testbench environments. Decorator pattern is used to avoid class extension, when new responsibilities are to be added to an object. The application is presented for dynamically adding new constraints to an object. It allows creation of a pre-defined set of constraints to be used as a constraint library; whereas coding all possible combinations of constraints can result in sub-class explosion. Similar application is presented for test sequencing, where a combination of sequences/scenarios are dynamically put together to build more complex scenarios. Application of observer pattern is presented to maintain configuration consist in a chip-level testbench, when registers are accessed at runtime. In the proposed technique, re-configuration is self-maintained. A value change in a configuration register is observed by dependent modules and corresponding updates are taken place automatically. The knowledge of dependency is built as modules are attached to an observant subject.
Keywords :
program verification; chip-level testbench; complex scenarios; constraint library; functional verification; observer design patterns; subclass explosion; Electronic design automation and methodology; Explosions; Production facilities; Registers; Runtime; Software design; Software libraries; Testing;
Conference_Titel :
High Level Design Validation and Test Workshop, 2008. HLDVT '08. IEEE International
Conference_Location :
Incline Village, NV
Print_ISBN :
978-1-4244-2922-6
DOI :
10.1109/HLDVT.2008.4695867