DocumentCode
1626059
Title
Quality issues of high pin count fine pitch VLSI packages
Author
Hnatek, Eugene R. ; Livesay, Billy R.
Author_Institution
Viking Labs./Honeywell, Mountain View, CA, USA
fYear
1989
Firstpage
397
Lastpage
421
Abstract
The continuous demand for both high-speed integrated circuits of all types and increased on-chip circuitry density is fueling the need for high-pin-count (>256), fine-line (⩽20 mil) packages. In the past the package served primarily as mechanical protection for the chip and as a convenient way to bring signals from the chip to the next level of packaging. With the rapid growth in the use of VLSI circuits, increasing thought must be given to the design of the package. The authors show that the quality of high-pin-count, fine-pitch VLSI packages is complex and dependent on a multiplicity of issues: electrical, testing and tester, thermal management, and materials/interface. They conclude that each of these must be addressed to yield a quality package. Further, the limiting factors to the widespread use of VLSI circuits will be the ability to test these devices accurately and effectively, as well as the ability to package the die reliably and provide an efficient connection to the external world
Keywords
VLSI; digital integrated circuits; heat sinks; integrated circuit technology; integrated circuit testing; packaging; IC testing; high pin count fine pitch VLSI packages; high-speed integrated circuits; materials/interface; on-chip circuitry density; testability; thermal management; CMOS technology; Costs; Inductance; Integrated circuit interconnections; Integrated circuit packaging; Integrated circuit technology; Materials testing; Silicon; Thermal management; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1989. Proceedings. Meeting the Tests of Time., International
Conference_Location
Washington, DC
Type
conf
DOI
10.1109/TEST.1989.82324
Filename
82324
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