Title :
The use of T-CAD tool for yield improvement on fast-switching power rectifiers
Author :
Garcia, P. ; del Valle, J.L. ; Matsumoto, Y. ; Akinade, K. ; Aldrete, H.E.
Author_Institution :
GDL Top Organ., Guadalajara, Mexico
fDate :
6/24/1905 12:00:00 AM
Abstract :
Technological changes for mature devices are not as straightforward as one wishes. Reducing learning curve time is a must to remain competitive in the market share. This paper present a method based on device physics and simulation using T-CAD tool coupled with a virtual DOE technique to assess yield improvement and learning curve reduction. The method is applied to platinum doped fast switching power rectifiers.
Keywords :
design of experiments; power semiconductor switches; semiconductor device models; solid-state rectifiers; technology CAD (electronics); Si:Pt; T-CAD tool; cumulative yield; device simulation; learning curve; platinum doped fast switching power rectifier; virtual DOE technique; Breakdown voltage; Conductivity; Degradation; Doping; Epitaxial layers; Leakage current; Physics; Platinum; Rectifiers; US Department of Energy;
Conference_Titel :
Devices, Circuits and Systems, 2002. Proceedings of the Fourth IEEE International Caracas Conference on
Print_ISBN :
0-7803-7380-4
DOI :
10.1109/ICCDCS.2002.1004029
