DocumentCode
1626199
Title
Test and validation of a non-deterministic system — True Random Number Generator
Author
Udawatta, Kapila ; Ehsanian, Mehdi ; Maidanov, Sergey ; Musunuri, Surya
fYear
2008
Firstpage
77
Lastpage
84
Abstract
We present a validation and test methodology for a non-deterministic system, namely a True Random Number Generator (TRNG). The TRNG testing methods at Intel have matured over time, and what we present here is the 3rd generation methodology used in our latest chipset products. In addition to well known DFT and DFV techniques, testing of a TRNG requires rigorous statistical analysis to determine its proper operation. Known published works and standards donpsilat address the TRNG testing and validation issues in high volumes or their recommendations are impractical in real manufacturing constraints. We present a practical statistical methodology for TRNG testing in a high volume manufacturing environment. Its validity was proven by testing a 65-nm CMOS-based TRNG design to meet NIST standards. Our methodology can be extended to the testing of similar non-deterministic systems.
Keywords
logic testing; random number generation; CMOS-based design; nondeterministic system; true random number generator; Cryptography; Entropy; Logic testing; Manufacturing; NIST; Random number generation; Standards development; Standards publication; Statistical analysis; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
High Level Design Validation and Test Workshop, 2008. HLDVT '08. IEEE International
Conference_Location
Incline Village, NV
ISSN
1552-6674
Print_ISBN
978-1-4244-2922-6
Type
conf
DOI
10.1109/HLDVT.2008.4695881
Filename
4695881
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