Title :
A HW/SW co-simulation framework for the verification of multi-CPU systems
Author :
Cordibella, S. ; Fummi, F. ; Perbellini, G. ; Quaglia, D.
Author_Institution :
Dept. of Comput. Sci., Univ. of Verona, Verona
Abstract :
This work focuses on the HW/SW co-simulation of complex systems consisting of several independent CPUpsilas (multi-CPU systems) such as multi-processor system-on-chip (MPSoC) and wireless sensor networks. The verification of such systems requires the efficient evaluation of hardware-software interactions in several processing units. We present a HW/SW co-simulation framework consisting of a timing-accurate interaction of a SystemC simulator with an array of instruction set simulators (ISS). Tests with up to one hundred ISSpsilas show that the proposed framework exploits the power of todaypsilas multi-processor hosts and represents a valuable tool for the validation of not only eight-core MPSoCpsilas but also large sensor networks.
Keywords :
hardware description languages; hardware-software codesign; instruction sets; logic simulation; logic testing; microprocessor chips; multiprocessing systems; HW/SW co-simulation framework; MPSoC; SystemC simulator; complex system; instruction set simulator; multiCPU system verification; multiprocessor system-on-chip; timing-accurate interaction; wireless sensor network; Central Processing Unit; Communication channels; Computer science; Field programmable gate arrays; Hardware; Operating systems; Software prototyping; Testing; Virtual prototyping; Wireless sensor networks;
Conference_Titel :
High Level Design Validation and Test Workshop, 2008. HLDVT '08. IEEE International
Conference_Location :
Incline Village, NV
Print_ISBN :
978-1-4244-2922-6
DOI :
10.1109/HLDVT.2008.4695888
