DocumentCode :
1626622
Title :
Real-time STAP demonstration on an embedded high performance computer
Author :
Linderman, Mark H. ; Linderman, Richard W.
Author_Institution :
Rome Lab., US Air Force, NY, USA
fYear :
1997
Firstpage :
54
Lastpage :
59
Abstract :
Real-time signal processing for a 16 channel phased array radar, including space-time adaptive processing (STAP) algorithms, has been implemented using a 29 node ruggedized version of an Intel Paragon. Techniques employed to efficiently implement each step of the signal processing are discussed. An overall throughput of 3.15 GFLOPS and processing efficiency of 48% has been achieved, indicating that embedded high performance computers can deliver a significant percentage of their advertised peak throughput under real system constraints
Keywords :
adaptive signal processing; antenna phased arrays; array signal processing; radar antennas; radar computing; radar signal processing; real-time systems; 16 channel phased array radar; 3.15 GFLOPS; Intel Paragon; embedded high performance computer; processing efficiency; real system constraints; real-time STAP demonstration; real-time signal processing; space-time adaptive processing algorithms; throughput; Adaptive arrays; Adaptive signal processing; Array signal processing; Embedded computing; High performance computing; Phased arrays; Radar signal processing; Signal processing algorithms; Spaceborne radar; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radar Conference, 1997., IEEE National
Conference_Location :
Syracuse, NY
Print_ISBN :
0-7803-3731-X
Type :
conf
DOI :
10.1109/NRC.1997.588132
Filename :
588132
Link To Document :
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