• DocumentCode
    1626946
  • Title

    Effects of positive gate bias stressing and subsequent recovery treatment in power VDMOSFETs

  • Author

    Stojadinovic, Ninoslav ; Manic, Ivica ; Djoric-Veljkovic, Snezana ; Davidovic, Vojkan ; Golubovic, Snezana ; Dimitrijev, Sima

  • Author_Institution
    Fac. of Electron. Eng., Nis Univ., Serbia
  • fYear
    2002
  • fDate
    6/24/1905 12:00:00 AM
  • Abstract
    The effects of positive gate bias stressing and subsequent recovery treatment on threshold voltage and channel carrier mobility of power VDMOSFETs and the underlying changes in gate oxide-trapped charge and interface trap densities are presented and analysed in terms of the mechanisms responsible. Positive gate bias stress caused significant positive threshold voltage shift and mobility reduction in power VDMOSFETs, while their subsequent recovery treatment resulted into almost completely recovered threshold voltage and only partially recovered mobility. As for the mobility, it was still more than 40% below the initial value and could not be completely recovered by any additional treatment. Tunneling mechanisms associated with gate oxide traps are proposed as the dominant mechanisms responsible for buildup of positive oxide-trapped charge (electron tunneling from neutral oxide traps into the oxide conduction band) and interface traps (subsequent hole tunneling from the charged oxide traps to interface-trap precursors) during the stressing. Mechanisms related to a presence of hydrogen species are proposed as the main mechanisms responsible for decrease in densities of oxide-trapped charge (interface trap passivation due to their reaction with hydrogen atoms) and interface traps (hydrogen molecule cracking at charged oxide traps) during the recovery treatment. The effects of pre-irradiation positive gate bias stress on radiation response of power VDMOSFETs are also presented. Larger irradiation induced threshold voltage shift and mobility reduction in stressed devices are observed, clearly demonstrating inapplicability of gate bias stressing for radiation hardening of power VDMOSFETs.
  • Keywords
    carrier mobility; interface states; passivation; power MOSFET; radiation hardening (electronics); tunnelling; channel carrier mobility; electron tunneling; gate oxide trapped charge; hole tunneling; hydrogen molecule cracking; hydrogen passivation; interface trap density; positive gate bias stress; power VDMOSFET; radiation hardening; recovery treatment; threshold voltage; Electron traps; Electronic mail; Hydrogen; Ionizing radiation; Power engineering and energy; Power supplies; Radiation hardening; Stress; Threshold voltage; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Devices, Circuits and Systems, 2002. Proceedings of the Fourth IEEE International Caracas Conference on
  • Print_ISBN
    0-7803-7380-4
  • Type

    conf

  • DOI
    10.1109/ICCDCS.2002.1004073
  • Filename
    1004073