Title :
A highly integrated GPS front-end for cellular applications in 90nm CMOS
Author :
Yanduru, Naveen K. ; Low, Kah-Mun
Author_Institution :
Texas Instrum., Dallas, TX
Abstract :
A GPS receiver front-end consisting of an LNA and a mixer implemented in a 90 nm CMOS process is presented. The measured performance satisfies the linearity requirement set by cellular blockers, without requiring an external LNA or SAW filter that are typically used in GPS receivers for cellular applications. A highly linear RF mixer is designed for this purpose that exploits the short channel effect of deep sub-micron CMOS. The LNA has a single-ended input and provides a differential output. The front-end achieves 38 dB of voltage gain and a noise figure of 1.8 dB. The IIP3 performance is a function of the offset between the GPS signal and the two-tone interferers and varies from -6 dBm to 15 dBm. The NF degradation in the presence of a -30 dBm DCS band blocker is less than 0.5 dB.
Keywords :
CMOS integrated circuits; Global Positioning System; low noise amplifiers; mixers (circuits); mobile radio; radio receivers; radiofrequency integrated circuits; GPS receiver; LNA; cellular applications; cellular blockers; deep sub-micron CMOS; differential output; gain 38 dB; highly linear RF mixer; noise figure 1.8 dB; size 90 nm; two-tone interferers; CMOS process; Degradation; Gain; Global Positioning System; Linearity; Noise figure; Noise measurement; Radio frequency; SAW filters; Voltage; CMOS Receivers; GPS; GPS for cellular;
Conference_Titel :
Circuits and Systems Workshop: System-on-Chip - Design, Applications, Integration, and Software, 2008 IEEE Dallas
Conference_Location :
Dallas, TX
Print_ISBN :
978-1-4244-2955-4
Electronic_ISBN :
978-1-4244-2956-1
DOI :
10.1109/DCAS.2008.4695917
