Title :
A linearized CMOS Quad using selective even feedback
Author :
Acharya, Venkatesh ; Banerjee, Bhaskar ; Viswanathan, T.R.
Author_Institution :
Univ. of Texas at Dallas, Richardson, TX
Abstract :
A CMOS Quad containing two asymmetric differential-pairs when driven by a differential input-voltage generates two output-currents: one that is approximately proportional to the input-voltage, and the other, to the square of the input-voltage. We present a simple circuit modification that feeds back the square-law current to linearize the Quad and hence reducing distortion. Also this feedback enables us to take differential output current without demanding high common mode rejection ratio from the next stage. Analytical results based on the simple square-law model for the FETs are presented. Simulation results obtained from large-signal analysis using 0.18 mum TSMC BSIM3 models show that the total harmonic distortion is below 0.25% for a 1 KHz sinusoidal input. Distortion remains low up to a frequency of 1 GHz.
Keywords :
CMOS integrated circuits; circuit feedback; field effect transistors; integrated circuit modelling; semiconductor device models; FETs; TSMC BSIM3 models; asymmetric differential-pairs; common mode rejection ratio; differential input-voltage; differential output current; large-signal analysis; linearized CMOS Quad; selective even feedback; square-law model; total harmonic distortion; Analytical models; Circuit simulation; FETs; Feeds; Frequency; Harmonic analysis; Output feedback; Total harmonic distortion; Transconductance; Voltage;
Conference_Titel :
Circuits and Systems Workshop: System-on-Chip - Design, Applications, Integration, and Software, 2008 IEEE Dallas
Conference_Location :
Dallas, TX
Print_ISBN :
978-1-4244-2955-4
Electronic_ISBN :
978-1-4244-2956-1
DOI :
10.1109/DCAS.2008.4695926
