DocumentCode :
1627974
Title :
Novel approach using tapers for high power FET chips characterization
Author :
Zoyo, M. ; Galy, C ; Darbandi, A. ; Lapierre, L. ; Sautereau, J.F.
Author_Institution :
Equipe Antennes Dispositif et mater. Microondes, Toulouse, France
fYear :
1995
Firstpage :
447
Lastpage :
450
Abstract :
This paper introduces a novel approach for the characterization of high power devices of total gate periphery (GP) around 20 mm. Electrical models of two power FET chip devices (GP=4.8 mm and 12.6 mm) are obtained from scattering parameters measurements based on broadband impedance transformers and from DC pulsed measurements. A small scaling factor applied on these electrical models allows one to analyse high power devices
Keywords :
S-parameters; characteristics measurement; field effect integrated circuits; impulse testing; integrated circuit measurement; integrated circuit modelling; power integrated circuits; 12.6 mm; 4.8 mm; DC pulsed measurements; broadband impedance transformers; electrical models; power FET chip characterization; scaling factor; scattering parameters measurements; tapers; total gate periphery; Circuit testing; Electric variables measurement; FETs; Impedance measurement; Power measurement; Pulse measurements; Scattering parameters; Semiconductor device measurement; Transformers; Transmission lines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems, and Electronics, 1995. ISSSE '95, Proceedings., 1995 URSI International Symposium on
Conference_Location :
San Francisco
Print_ISBN :
0-7803-2516-8
Type :
conf
DOI :
10.1109/ISSSE.1995.498028
Filename :
498028
Link To Document :
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