• DocumentCode
    1628062
  • Title

    Photoemission identification of emitter resistance for CMOS latch-up hysteresis

  • Author

    Chen, Ming-Jer ; Jeng, Jeng-Kuo ; Tseng, Ping-Nan ; Tsai, Nun-Sian ; Wu, Ching-Yuan

  • Author_Institution
    Inst. of Electron., Nat. Chiao-Tung Univ., Hsin-Chu, Taiwan
  • fYear
    1990
  • Firstpage
    231
  • Lastpage
    235
  • Abstract
    The authors present a photoemission detection technique applied to a specially designed p-n-p-n structure in order to accurately determine the essential parameters dominating the hysteresis of I-V characteristics in CMOS latchup paths. It is shown experimentally and theoretically that the emitter resistance plays a significant role in producing hysteresis. The authors also describe the three-dimensional effect in terms of pin combinations for the formation of the hysteresis
  • Keywords
    CMOS integrated circuits; hysteresis; integrated circuit testing; photoemission; CMOS latchup paths; I-V characteristics; emitter resistance; latch-up hysteresis; p-n-p-n structure; photoemission detection technique; pin combinations; three-dimensional effect; CMOS process; Cathodes; Electric resistance; Hysteresis; Optical microscopy; Photoelectricity; Semiconductor device manufacture; Stimulated emission; Substrates; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronic Test Structures, 1991. ICMTS 1991. Proceedings of the 1991 International Conference on
  • Conference_Location
    Kyoto
  • Print_ISBN
    0-87942-588-1
  • Type

    conf

  • DOI
    10.1109/ICMTS.1990.161748
  • Filename
    161748