DocumentCode :
1628907
Title :
Order reduction of high-speed interconnect electrical models: The issue of passivity
Author :
Cangellaris, Andreas C. ; Celik, Mustafa
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA
fYear :
1998
Firstpage :
132
Lastpage :
137
Abstract :
Rapid distributed circuit simulation is now being recognized as a critical component of next-generation computer-aided design frameworks to be used for performance evaluation and design of the information processing and communication systems of the 21st century. Apart from very simple systems, computer simulation of electromagnetic interactions in high-speed interconnects and packaging structures is hindered by the very large number of degrees of freedom involved in the discrete model. One potentially useful approach to overcoming this computational bottleneck is model order reduction, where parts of the electromagnetic model are replaced by models which are of substantially lower order, yet are capable of capturing the electromagnetic behaviour of the original subsystems with sufficient engineering accuracy. Reliable use of the generated reduced-order model in network-oriented simulators depends strongly on its passivity. This paper presents methodologies for the generation of passive reduced-order models of interconnect networks. Furthermore, it proposes a general set of constraints on the state representation of the discrete interconnect model for the reduced order model to be passive
Keywords :
circuit CAD; circuit analysis computing; electromagnetic fields; integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; communication systems; computational bottleneck; computer simulation; computer-aided design frameworks; discrete interconnect model; discrete model; electromagnetic behaviour; electromagnetic interactions; electromagnetic model; high-speed interconnect electrical models; high-speed interconnects; information processing systems; interconnect networks; model order reduction; model passivity; model state representation; network-oriented simulators; packaging structures; passive reduced order model; passive reduced-order models; passivity; performance evaluation; rapid distributed circuit simulation; reduced-order model reliability; Circuit simulation; Computational modeling; Computer simulation; Design automation; Electromagnetic modeling; Information processing; Integrated circuit interconnections; Packaging; Reduced order systems; Reliability engineering;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
IC/Package Design Integration, 1998. Proceedings. 1998 IEEE Symposium on
Conference_Location :
Santa Cruz, CA
Print_ISBN :
0-8186-8433-X
Type :
conf
DOI :
10.1109/IPDI.1998.663645
Filename :
663645
Link To Document :
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