Title :
A programmable gain amplifier with DC-offset cancellation for power line communication
Author :
Zhong, Chaoli ; Zhu, Di ; Huang, Guanzhong ; Wan, Peiyuan ; Lin, Ping
Author_Institution :
Beijing Embedded Syst. Key Lab., Beijing Univ. of Technol., Beijing, China
Abstract :
This paper presents an improved DC-offset cancellation (DCOC) circuit for programmable-gain amplifier (PGA) in power line communication. It is a speed-enhanced and low-noisy method by using current-mode feedback. The output DC-offset can be reduced from several hundred millivolts to less than 5mV over 64 dB gain range. Furthermore, this proposed technique does not bring in excessive design complexity or large chip area by reusing master-slave configuration that already existed in the system. The circuit is designed in 0.18μm CMOS technology.
Keywords :
CMOS integrated circuits; amplifiers; carrier transmission on power lines; CMOS technology; DC-offset cancellation; current-mode feedback; low-noisy method; master-slave configuration; power line communication; programmable gain amplifier; size 0.18 mum; speed-enhanced method; Band pass filters; Bandwidth; Electronics packaging; Gain; Power line communications; Resistors; Transceivers;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-5797-7
DOI :
10.1109/ICSICT.2010.5667337
