DocumentCode
1629347
Title
Interface state density measurements in gated p-i-n silicon nanowires as a function of the nanowire diameter
Author
Cohen, G.M. ; Cartier, E. ; Bangsaruntip, S. ; Majumdar, A. ; Haensch, W. ; Gignac, L.M. ; Mittal, S. ; Sleight, J.W.
Author_Institution
IBM Res. Div., T. J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
2010
Firstpage
277
Lastpage
278
Abstract
Gate-all-around p-i-n silicon nanowires (NW) diodes with effective nanowire diameter from 15 nm down to 4 nm (±1.3 nm) were fabricated to enable interface state density (Nιι) measurements using the charge pumping (CP) method. The Nη of the NWs was also measured by the conductance method and was in good agreement with the CP method. The linear relation between the CP current and the pulse frequency was not maintained in the smallest diameter NWs. The dependency on the pulse rise and fall times was also investigated and is correlated to the lifetime of the traps. The impact of the cylindrical geometry on the measured CP current is discussed.
Keywords
electronic density of states; elemental semiconductors; interface states; nanowires; p-i-n diodes; semiconductor quantum wires; silicon; Si; charge pumping method; conductance method; cylindrical geometry; gate-all-around p-i-n silicon nanowires diodes; gated p-i-n silicon nanowires; interface state density measurements; nanowire diameter; traps lifetime; Logic gates;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference (DRC), 2010
Conference_Location
South Bend, IN
ISSN
1548-3770
Print_ISBN
978-1-4244-6562-0
Electronic_ISBN
1548-3770
Type
conf
DOI
10.1109/DRC.2010.5551960
Filename
5551960
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