DocumentCode :
1629606
Title :
Formalization and verification of safety properties of Statechart specifications
Author :
Kang, Kyo C. ; Ko, Kwang I.
Author_Institution :
Dept. of Comput. Sci. & Eng., Pohang Univ. of Sci. & Technol., South Korea
fYear :
1996
Firstpage :
16
Lastpage :
27
Abstract :
There have been many analysis methods proposed for the verification of safety properties of real-time systems. Most of these methods, however, are not powerful enough for complex and safety-critical real-time systems due mainly to the lack of language primitives for specifying complex requirements (e.g., ESM) or heuristic verification procedures that do not provide verification results with certainty (e.g., Statechart and Modechart). A new approach for the verification of safety properties of real-time systems is introduced. This approach adopts Statechart to specify real-time systems behaviors. The authors redefined the step semantics of Statechart to address the problems of the synchrony hypothesis inherent to the original step semantics. A operational semantics of Statechart is defined based on the step semantics and a verification method for safety properties is developed based on the operational semantics of Statechart. This method verifies safety properties using a reachability graph derived from a Statechart diagram. They did not sacrifice the practicality or expressive power of Statechart for the simplification of analysis. Useful event and action primitives including the timeout event tm() and scheduled-action sc!() are included in the analysis. A train gate system is used as an example to illustrate the concepts in the paper
Keywords :
computational linguistics; finite state machines; formal specification; formal verification; real-time systems; safety-critical software; Statechart specifications; action primitives; complex real-time systems; event primitives; formalization; operational semantics; reachability graph; real-time systems behavior specification; safety properties; safety-critical real-time systems; statechart diagram; step semantics; synchrony hypothesis; train gate system; verification; Automata; Broadcasting; Concurrent computing; Logic; Performance analysis; Real time systems; Safety; Scheduling; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Software Engineering Conference, 1996. Proceedings., 1996 Asia-Pacific
Conference_Location :
Seoul
Print_ISBN :
0-8186-7638-8
Type :
conf
DOI :
10.1109/APSEC.1996.566736
Filename :
566736
Link To Document :
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