Proceedings. 24th IEEE VLSI Test Symposium

fYear

2006

Abstract

The following topics are dealt with: delay testing; high speed interconnect test; reliability screening methods for high-performance processors; test quality; scan compression; IP protection; flash and memory testing; nanometer IC testing; yield analysis; low power applications; FPGA embedded instrumentation; ATPG; test generation and test flow; IDDQ, MEMS and wireless testing; silicon on chip; RF testing; transistor level diagnosis; analog test; nanoscale testing; scan based diagnosis; and mixed signal test.

Keywords

IP networks; automatic test pattern generation; field programmable gate arrays; flash memories; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; micromechanical devices; mixed analogue-digital integrated circuits; nanoelectronics; radiofrequency integrated circuits; system-on-chip; ATPG; FPGA embedded instrumentation; IDDQ; IP protection; MEMS; RF testing; analog test; flash and memory testing; high performance processors; high speed interconnect test; low power applications; mixed signal test; nanometer IC testing; nanoscale testing; reliability screening methods; scan based diagnosis; scan compression; silicon on chip; test flow; test generation; test quality; transistor level diagnosis; wireless testing; yield analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Test Symposium, 2006. Proceedings. 24th IEEE

Conference_Location

Berkeley, CA

Print_ISBN

0-7695-2514-8

Type

conf

DOI

10.1109/VTS.2006.2

Filename

1617541