DocumentCode :
16302
Title :
Resource-aware architecture design and implementation of hough transform for a real-time iris boundary detection system
Author :
Ngo, Hau ; Rakvic, Ryan ; Broussard, Randy ; Ives, Robert
Author_Institution :
Electr. & Comput. Eng. Dept., United States Naval Acad., Annapolis, MD, USA
Volume :
60
Issue :
3
fYear :
2014
fDate :
Aug. 2014
Firstpage :
485
Lastpage :
492
Abstract :
In this paper, a resource efficient architecture design for the circular Hough transform based on Field Programmable Gate Array (FPGA) technology is presented. The circular Hough transform is implemented to detect iris boundary in a binary edge image. A novel modular design is proposed to reduce the required memory space by 93% compared to the direct implementation while maintaining a high detection rate over 92%. The parallel-pipelined implementation of the proposed architecture demonstrates a high speed processing capability that is suitable to support real-time iris recognition in resource constrained systems. Therefore, the proposed technology can be used in portable consumer devices such as mobile phones and tablets where iris recognition application is involved.
Keywords :
Hough transforms; field programmable gate arrays; iris recognition; pipeline processing; FPGA technology; binary edge image; circular Hough transform; field programmable gate array technology; iris recognition application; mobile phones; modular design; parallel-pipelined implementation; portable consumer devices; real-time iris boundary detection system; resource constrained systems; resource-aware architecture design; tablets; Field programmable gate arrays; Iris; Iris recognition; Memory management; Random access memory; Transforms; FPGA; circular Hough transform; iris detection and recognition; parallel and pipelined architecture;
fLanguage :
English
Journal_Title :
Consumer Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-3063
Type :
jour
DOI :
10.1109/TCE.2014.6937334
Filename :
6937334
Link To Document :
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