Title :
A low-cost solution for protecting IPs against scan-based side-channel attacks
Author :
Lee, Jeremy ; Tebranipoor, M. ; Plusquellic, Jim
Author_Institution :
Dept. of CSEE, Maryland Univ., Baltimore County, MD
Abstract :
Scan designs used for testing also provide an easily accessible port for hacking. In this paper, we present a new low-cost secure scan design that is effective against scan-based side-channel attacks. By integrating a test key into test vectors that are scanned into the chip, testing and accessing scan chains are guaranteed to be allowed only by an authorized user. Any attempt to use the scan chain without a verified test vector will result in a randomized output preventing potential side-channel attacks. The proposed technique has a negligible area overhead, has no negative impact on chip performance, and places several levels of security over the scan chain protecting it from potential attacks
Keywords :
IP networks; integrated circuit design; network-on-chip; security; IP protection; chip performance; low cost solution; scan-based side-channel attacks; Circuit testing; Computer hacking; Controllability; Design for testability; Hardware; Information security; Manufacturing; Observability; Protection; Semiconductor device measurement;
Conference_Titel :
VLSI Test Symposium, 2006. Proceedings. 24th IEEE
Conference_Location :
Berkeley, CA
Print_ISBN :
0-7695-2514-8