Quality factor enhancement of spiral inductors with patterned trench isolation

Loss mechanism in the low-resistivity substrate degrades the quality factor of spiral inductors. This paper presents an efficient method to improve Q factor of spiral inductors based on standard low-resistivity silicon substrate by using patterned trench isolation. Both the inductors with and without patterned trench isolation have been designed and simulated by the three-dimensional electromagnetic (EM) simulator, Ansoft HFSS. Major performance parameters have been analyzed in detail, such as the quality factor and self-resonant frequency. The simulated results show that this method can increase the maximum Q factor and self-resonant frequency (f_SR) effectively when the other structure parameters remain unchanged. For a 3.5-turn inductor on low-resistivity silicon, Q_max of the inductor with 10μm depth of patterned trench isolation is 12.4% higher than the inductor without patterned trench isolation. f_SR of the inductor with patterned trench isolation is 16.5GHz while f_SR of the inductor without patterned trench isolation is 15.3GHz, which has nearly improved by 1GHz. The proposed optimizing method of patterned trench isolation is also compatible with standard VLSI process. All conclusion and analysis will be useful for optimizing on-chip spiral inductors, especially for their application to RFICs.