DocumentCode :
1630734
Title :
CMOS NBTI degradation and recovery behaviors in a wide temperature range
Author :
Ji, X. ; Liao, Y. ; Yu, B. ; Yan, F. ; Shi, Y. ; Zhang, D. ; Guo, Q.
Author_Institution :
Inst. of Electron. Sci. & Eng., Nanjing Univ., Nanjing, China
fYear :
2010
Firstpage :
1642
Lastpage :
1644
Abstract :
Negative Bias Temperature (NBT) degradation in PMOS device with ultrathin SiON gate dielectric has been investigated at the temperature ranging from 218 K to 463 K. It is found that the degradation has different time-dependence behavior and activation energy above and below 268 K, evidencing two mechanisms in NBT degradation. One is related to interface state traps suggested in classic R-D model with neutral hydrogen atoms (H) as the diffusion species. The other is the hole trapping generation. The later dominates NBT degradation below 268 K. The possible hole trapping mechanism is proposed as inelastic hole tunneling and trapping into oxygen and nitrogen-related trap precursors under NBT stress.
Keywords :
CMOS integrated circuits; MIS devices; dielectric materials; oxygen compounds; silicon compounds; CMOS NBTI degradation; PMOS device; SiON; classic R-D model; hole trapping generation; inelastic hole trapping; inelastic hole tunneling; interface state traps; negative bias temperature degradation; neutral hydrogen atoms; nitrogen-related trap precursors; oxygen-related trap precursors; recovery behaviors; temperature 218 K to 463 K; ultrathin gate dielectric; Activation Energy; Inelastic Hole Trapping; Interface States; Negative Base Temperature Instability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-5797-7
Type :
conf
DOI :
10.1109/ICSICT.2010.5667402
Filename :
5667402
Link To Document :
بازگشت