Statistical analysis of resistive switching characteristics in ReRAM test arrays

Author

Zambelli, Cristian ; Grossi, Alessandro ; Olivo, Piero ; Walczyk, Damian ; Bertaud, T. ; Tillack, Bernd ; Schroeder, Thomas ; Stikanov, Valeriy ; Walczyk, C.

Author_Institution

Dipt. di Ing., Univ. degli Studi di Ferrara, Ferrara, Italy

fYear

2014

fDate

24-27 March 2014

Firstpage

27

Lastpage

31

Abstract

The design and the manufacturing of ReRAM test structures allow deeper insight in the performance of the FORMING, RESET, and SET operations at array level, providing details on the process induced variability of the technology, and on the potential sources of failures. Test structures allow also demonstrating the integration capability of the ReRAM technology using a CMOS-compatible process ramping up such non-volatile memory to a maturity level.

Keywords

CMOS memory circuits; logic testing; random-access storage; statistical analysis; CMOS-compatible process; FORMING operations; RESET operations; ReRAM technology; ReRAM test arrays; nonvolatile memory; process induced variability; resistive switching characteristics; statistical analysis; Arrays; Microprocessors; Nonvolatile memory; Resistance; Switches; Testing; ReRAM; array; statistics; test-structure;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures (ICMTS), 2014 International Conference on

Conference_Location

Udine

ISSN

1071-9032

Print_ISBN

978-1-4799-2193-5

Type

conf

DOI

10.1109/ICMTS.2014.6841463

Filename

6841463