DocumentCode :
1630815
Title :
Session Abstract
Author :
Parvathala, P.
Author_Institution :
Intel Corporation
fYear :
2006
Firstpage :
158
Lastpage :
159
Abstract :
Device scaling has resulted in higher and higher product frequencies. With issues like printability concerns, increased noise and decreased noise tolerance on the rise with every generation, it is becoming clear that we need to complement structural test content with functional content in order to test for delay defects and marginal circuits. This becomes further important as the focus shifts to low-power designs. The motivation for functional tests comes from concerns that structural test application does not replicate the precise operating conditions needed on the DUT in order to sift the good parts from the defective ones. Since during functional test, the DUT operating conditions (voltage, temperature, power droop, noise environment) are similar to the device specifications, the confidence in the detecting such small deviations (delay/marginality) is higher.
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 2006. Proceedings. 24th IEEE
Print_ISBN :
0-7695-2514-8
Type :
conf
DOI :
10.1109/VTS.2006.63
Filename :
1617582
Link To Document :
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