Common-floating gate test structure for separation of cycling-induced degradation components in split-gate flash memory cells

The program-erase cycling-induced degradation mechanisms in a split-gate SuperFlash^® memory cell were analyzed using a test structure containing two cells with a common floating gate. This test structure allowed us to separate the degradation mechanisms taking place in the floating-gate oxide and tunnel oxide during cycling. It was demonstrated that the program-induced floating gate oxide degradation becomes less significant for the advanced SuperFlash technology, which uses lower programming voltage.