Title :
Improving gate-level ATPG by traversing concurrent EFSMs
Author :
Di Guglielmo, Giuseppe ; Fummi, Franco ; Marconcini, Cristina ; Pravadelli, Graziano
Author_Institution :
Dipt. di Informatica, Univ. di Verona, Italy
Abstract :
The paper describes a high-level pseudodeterministic ATPG that explores the DUT state space by exploiting an easy-to-traverse extended FSM model. Testing of hard-to-detect faults is thus improved. Generated test sequences are very effective in detecting both high-level faults and gate-level stuck-at faults. Thus, the reuse of test sequences generated by the proposed ATPG allows to improve the stuck-at fault coverage and to reduce the execution time of commercial gate-level ATPGs.
Keywords :
automatic test pattern generation; fault location; finite state machines; high level synthesis; DUT state space; gate-level ATPG; gate-level stuck-at faults; hard-to-detect fault testing; high-level ATPG; pseudodeterministic ATPG; traversing concurrent EFSM; Automata; Automatic test pattern generation; Automatic testing; Digital systems; Explosions; Fault detection; Hardware design languages; State-space methods; System testing; Test pattern generators;
Conference_Titel :
VLSI Test Symposium, 2006. Proceedings. 24th IEEE
Print_ISBN :
0-7695-2514-8
DOI :
10.1109/VTS.2006.39
