DocumentCode
1631830
Title
Boost power factor correction circuits
Author
Khan, Aslam ; Batarseh, I. ; Siri, Kasemsan ; Elias, Joe
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Central Florida, Orlando, FL, USA
fYear
1994
Firstpage
552
Lastpage
559
Abstract
In this paper, we present two modified boost converter topologies to be used as power factor correction circuits. Zero-voltage switching and proper transformer-core resetting are achieved utilizing the parasitic capacitance of the switch and the magnetization inductance of the transformer. Steady state analysis for the two circuits is given. To verify our theoretical approval, simulation results are reported.
Keywords
DC-DC power convertors; capacitance; inductance; magnetic cores; magnetisation; network analysis; power factor correction; switching circuits; transformer cores; transformers; boost converter topologies; power factor correction circuits; switch parasitic capacitance; transformer magnetization inductance; transformer-core resetting; zero-voltage switching; Circuit topology; Inductance; Magnetic analysis; Magnetic switching; Magnetization; Parasitic capacitance; Power factor correction; Steady-state; Switches; Zero voltage switching;
fLanguage
English
Publisher
ieee
Conference_Titel
Southcon/94. Conference Record
Conference_Location
Orlando, FL, USA
Print_ISBN
0-7803-9988-9
Type
conf
DOI
10.1109/SOUTHC.1994.498165
Filename
498165
Link To Document