DocumentCode
1631867
Title
Dynamic Performance of a Chip Level Adaptive Equalizer in a UMTS High Speed Downlink Packet Access (HSDPA) Terminal
Author
Pietraski, Philip ; Beluri, Mihaela C. ; DiFazio, Robert A. ; Yang, Rui ; Zeira, Ariela
Author_Institution
InterDigital Commun. Corp., Huntington, NY
fYear
2006
Firstpage
1
Lastpage
6
Abstract
The HSDPA mode of the 3GPP UMTS FDD standard extends the peak downlink rate of the W-CDMA waveform to 14 Mbps. To achieve high rates across a multipath channel the demodulator must include an advanced receiver rather than a conventional Rake. This paper presents the performance of an NLMS-based adaptive equalizer that supports mobile velocities as high as 250 km/h. The equalizer works with radio and implementation impairments typical of a non-HSDPA receiver, so redesign of the terminal front end is not required. A key aspect of the design is dynamically adjusting the equalizer step size and leakage parameter. There is often concern about the ability of an adaptive algorithm to operate in a highly mobile environment. The transient behavior is discussed in the context of HSDPA operation and examples are provided of initial convergence and operation after a sudden change in propagation conditions.
Keywords
3G mobile communication; adaptive equalisers; code division multiple access; 3GPP UMTS FDD standard; HSDPA mode; NLMS-based adaptive equalizer; UMTS high speed downlink packet access terminal; W-CDMA waveform; chip level adaptive equalizer; dynamic performance; peak downlink rate; 3G mobile communication; Adaptive equalizers; Demodulation; Downlink; Fading; Interference suppression; Multiaccess communication; Multipath channels; Quadrature amplitude modulation; RAKE receivers;
fLanguage
English
Publisher
ieee
Conference_Titel
Vehicular Technology Conference, 2006. VTC-2006 Fall. 2006 IEEE 64th
Conference_Location
Montreal, Que.
Print_ISBN
1-4244-0062-7
Electronic_ISBN
1-4244-0063-5
Type
conf
DOI
10.1109/VTCF.2006.212
Filename
4109477
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