DocumentCode :
1631976
Title :
Session Abstract
Author :
Galivanche, R. ; Gottlieb, B.
Author_Institution :
Intel Corporation
fYear :
2006
Firstpage :
422
Lastpage :
423
Abstract :
Moore’s law has enabled an ever increasing number of transistors in a given area, and this is expected to continue at least for the next decade. The additional transistors have enabled increased functionality in the products resulting in a richer user experience, while staying roughly within the same cost envelope. Over the last several years, innovations in design micro-architecture, signaling technologies, circuit styles, process technologies, power delivery and packaging have enabled us to further utilize the increased transistor count. Designer productivity has also been greatly improved due to EDA innovations such as high-level design languages, logic synthesis, verification, timing analysis, physical design and design re-use. As a result, the design complexity has steadily increased.
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 2006. Proceedings. 24th IEEE
Print_ISBN :
0-7695-2514-8
Type :
conf
DOI :
10.1109/VTS.2006.64
Filename :
1617628
Link To Document :
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