Title :
200-1200 MHz CMOS techniques
Author :
Svensson, Christer ; Yuan, Jiren
Author_Institution :
LSI Design Center, Linkoping Univ., Sweden
Abstract :
Circuit and design techniques for high speed logic using standard CMOS processing have been developed. Several experimental chips performing real functions at speeds up to 1 GHz are demonstrated. Beyond normal speed improvement methods, two new methods are used. These are (1) a new clocking technique, the true single phase clock, and (2) transistor sizing using a new optimizer tool, SLOP (Switch Level Optimizer Program). Extensions of these methods are discussed
Keywords :
CMOS integrated circuits; circuit CAD; clocks; integrated circuit technology; integrated logic circuits; logic CAD; optimisation; 200 to 1200 MHz; CMOS techniques; SLOP; Switch Level Optimizer Program; clocking technique; design techniques; experimental chips; high speed logic; optimizer tool; speed improvement methods; transistor sizing; true single phase clock; CMOS digital integrated circuits; CMOS logic circuits; CMOS process; CMOS technology; Clocks; Costs; Large scale integration; Logic design; Standards development; Timing;
Conference_Titel :
TENCON '92. ''Technology Enabling Tomorrow : Computers, Communications and Automation towards the 21st Century.' 1992 IEEE Region 10 International Conference.
Conference_Location :
Melbourne, Vic.
Print_ISBN :
0-7803-0849-2
DOI :
10.1109/TENCON.1992.271864
