DocumentCode
163324
Title
Design diversity redundancy with spatial-temporal voting applied to data acquisition systems
Author
Chenet, Cristiano P. ; Lanot, A.J.C. ; Balen, Tiago R.
Author_Institution
Programa de Pos-Grad. em Eng. Eletr., Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
fYear
2014
fDate
12-15 March 2014
Firstpage
1
Lastpage
6
Abstract
Due to the technology scaling of modern integrated circuits, the electronic systems are increasingly become more susceptible to transient faults, potentially caused by radiation interaction with the semiconductor. Furthermore the variability of production process, associated to this scaling, and the increase on the operating frequencies, lead to an increase on the probability of faults of complex circuits. This work addresses the concepts of redundancy and diversity with the DTMR technique to improve the fault tolerance of a data acquisition system. A physical implementation is made using a Programmable SoC from Cypress Semiconductor. Results indicate that the system is effective to tolerate single, double and multiple bit-flip faults.
Keywords
data acquisition; fault tolerance; integrated circuit design; integrated circuit reliability; radiation hardening (electronics); redundancy; scaling circuits; spatiotemporal phenomena; system-on-chip; Cypress semiconductor; DTMR technique; bit flip faults; complex circuit; data acquisition system; design diversity redundancy; diversity triple modular redundancy; electronic system; fault probability; fault tolerance; modern integrated circuits; production process variability; programmable SoC; semiconductor radiation interaction; spatial-temporal voting; technology scaling; transient faults; Decision support systems; Fault tolerant systems; Redundancy; design diversity; fault tolerance; redundancy;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Workshop - LATW, 2014 15th Latin American
Conference_Location
Fortaleza
Type
conf
DOI
10.1109/LATW.2014.6841900
Filename
6841900
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