Title :
Voltage optimization for state of the art RF-LDMOS for 2.1 GHz W-CDMA cellular infrastructure applications
Author :
Brech, H. ; Burger, W. ; Dragon, C. ; Pryor, B.
Author_Institution :
Semicond. Products Sector, Motorola Inc., Tempe, AZ, USA
Abstract :
The breakdown and operating voltage optimization of a RF-LDMOS power amplifier (PA) transistor for high power base station applications is presented. For a given device a local maximum in linear PAE is observed to be a function of the drain supply voltage. Best results were achieved for an optimized 10 mm device with a supply voltage of 32V. W-CDMA results (single carrier W-CDMA 3GPP signal at 2.14GHz, 8.5dB P/A) were 29% PAE with Pout=162mW/mm at -45dBc ACP, and 62% PAE with Pout=785mW/mm at P3dB with tuning for optimum back-off performance. To our knowledge these results represent the highest PAE´s for this back-off level ever reported for transistors of any material that are appropriate for high power infrastructure applications, as well as state of the art peak power densities for silicon.
Keywords :
UHF field effect transistors; UHF power amplifiers; cellular radio; code division multiple access; power MOSFET; semiconductor device breakdown; 10 mm; 2.1 GHz; 29 percent; 32 V; 3GPP signal; 62 percent; RF-LDMOS power amplifier transistor; W-CDMA cellular infrastructure; back-off tuning; breakdown voltage optimization; high power base station; linear PAE; Breakdown voltage; Digital signal processing; Electric breakdown; Fixtures; Impedance; Linearity; Multiaccess communication; Radio frequency; Semiconductor device breakdown; Silicon;
Conference_Titel :
Microwave Symposium Digest, 2003 IEEE MTT-S International
Conference_Location :
Philadelphia, PA, USA
Print_ISBN :
0-7803-7695-1
DOI :
10.1109/MWSYM.2003.1210917
