DocumentCode :
163359
Title :
Performance analysis of a clock generator PLL under TID effects
Author :
Junior Rossetto, Alan Carlos ; Wirth, Gilson Inacio ; Vanni Dallasen, Ricardo
Author_Institution :
Microelectron. Program, Fed. Univ. of Rio Grande do Sul, Porto Alegre, Brazil
fYear :
2014
fDate :
12-15 March 2014
Firstpage :
1
Lastpage :
5
Abstract :
Phase-Locked Loops (PLLs) are widely used as frequency synthesizers for clock signal generation. In aerospace environment, however, the performance of the PLL can be degraded due to the radiation exposure, which causes degradation of the parameters of its components. Thereby, this article presents a performance analysis of a clock generator PLL under TID effects. Output frequency, power consumption and control voltage variations are analyzed for different accumulated doses and compared with normal operating results, evidencing the performance degradation. PLL functional failures were also observed and discussed. The circuit was designed in a 0.35μm CMOS process and the simulations were performed using HSPICE simulator.
Keywords :
CMOS integrated circuits; MIS devices; SPICE; avionics; frequency synthesizers; phase locked loops; radiation hardening (electronics); CMOS process; HSPICE simulator; PLL functional failure; TID effect; aerospace environment; clock generator PLL; clock signal generation; component parameter degradation; control voltage variation; frequency synthesizer; output frequency; performance analysis; performance degradation; phase locked loop; power consumption; radiation exposure; size 0.35 mum; total ionizing dose; Clocks; Frequency conversion; Phase locked loops; Power demand; Threshold voltage; Voltage control; Voltage-controlled oscillators; PLL; ionizing radiation; simulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Workshop - LATW, 2014 15th Latin American
Conference_Location :
Fortaleza
Type :
conf
DOI :
10.1109/LATW.2014.6841921
Filename :
6841921
Link To Document :
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