An experimental ATM network for B-ISDN research

An experimental asynchronous transfer mode (ATM) network for B-ISDN research is described. A novel architecture is employed in which the control processor for the switch is interfaced via an ATM link. It is suggested that this architecture offers a number of unique advantages over conventional switch designs for both network operators and manufacturers. These include flexibility in locating and dimensioning control processors and the opening of a new market in exchange controllers. The switch also features multiple discard and delay priority levels on a per VC/VP basis