Design and Verification of High Throughput Transceiver for Next Generation Wireless LAN

In this paper, we describe the design and verification of the next generation wireless local area network (WLAN) physical (PHY) layer transceiver using a dual-band and multiple input multiple output-orthogonal frequency division multiplexing (MIMO-OFDM) scheme. The maximum data rate of the designed system is 243 Mbps in 40 MHz bandwidth and 2 streams mode. It uses 2 transmit and 3 receive antennas due to reasonable complexity and performance. For implementation and verification of this system, we set up the design flow. To reduce the design time, we propose intermediate design steps which use conventional C language by devising a few rules for hardware description. The system performance is measured from the generated C simulator. We implement all circuits in Xilinx FPGAs.