Title :
Laser Thermal Annealing: A low thermal budget solution for advanced structures and new materials
Author :
Huet, Karim ; Toque-Tresonne, Ines ; Mazzamuto, F. ; Emeraud, T. ; Besaucele, H.
Author_Institution :
Excico, Gennevilliers, France
Abstract :
With the growing demand for improved performance, increased storage capacity and more functionality, the industry is facing challenges which require disruptive solutions. With the introduction of 3D geometries (e.g. FinFET) and of active layer stacking (e.g. sensors), annealing of 3D architectures is a major challenge for future generation devices. The drive towards lower power consumption and better thermal management leads to the integration of alternatives to Si, materials for which the thermal budget has to be carefully controlled, e.g. Ge and III-Vs for logic or SiC and GaN for power devices. A promising approach is Laser Thermal Annealing (LTA), an ultrafast and low thermal budget process in production for the passivation of backside illuminated sensors and power devices. The high temperature annealing region is restricted to thin layers while keeping underlying layers at low temperature. An ultrafast annealing time and proper Laser parameters may achieve high performance and high yield process, locking-in the surface properties without damaging buried device layers. We present here a review of LTA applications including recent work in memory.
Keywords :
laser materials processing; passivation; rapid thermal annealing; surface structure; 3D architectures; 3D geometries; FinFET; LTA applications; Si alternatives; active layer stacking; advanced structures; backside illuminated sensor passivation; disruptive solutions; high temperature annealing region; laser parameters; laser thermal annealing; low thermal budget process; low thermal budget solution; new materials; power consumption; power device passivation; storage capacity; surface properties; thermal management; thin layers; ultrafast annealing time; ultrafast process; Annealing; Insulated gate bipolar transistors; Performance evaluation; Silicon; Silicon carbide; Three-dimensional displays;
Conference_Titel :
Junction Technology (IWJT), 2014 International Workshop on
Conference_Location :
Shanghai
DOI :
10.1109/IWJT.2014.6842020