• DocumentCode
    1636359
  • Title

    Pre-cycling with higher voltages for endurance improvement of silicon nanocrystal memory device

  • Author

    Wang, Yong ; Yang, Xiaonan ; Wang, Qin ; Huo, Zongliang ; Zhang, Manhong ; Zhang, Bo ; Liu, Ming

  • Author_Institution
    Inst. of Microelectron., Chinese Acad. of Sci., Beijing, China
  • fYear
    2010
  • Firstpage
    1265
  • Lastpage
    1267
  • Abstract
    Contradiction of threshold voltage shift window and endurance severely restricts the application of silicon nanocrystals (Si-NCs). Pre-cycling with higher program/erase (P/E) voltages greatly improves the endurance performance. Baked at 150°C, decreases of stored charges at programmed states have a similar trend, which proves the optimized method does not bring more traps than normal P/E cycling.
  • Keywords
    memory architecture; nanostructured materials; endurance improvement; pre-cycling; programmed state; silicon nanocrystal memory device; threshold voltage shift window; Degradation; Logic gates; Nanocrystals; Programming; Stress; Threshold voltage; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4244-5797-7
  • Type

    conf

  • DOI
    10.1109/ICSICT.2010.5667629
  • Filename
    5667629
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1636359