DocumentCode
1637533
Title
Operational amplifiers used in PLL charge pump circuits
Author
Liu, Xiaoming ; Jin, Jing ; Chen, Dongpo ; Zhou, Jianjun
Author_Institution
Center for Analog/RF Integrated Circuits (CARFIC), Shanghai Jiao Tong Univ., Shanghai, China
fYear
2010
Firstpage
475
Lastpage
477
Abstract
In this paper, the detailed design procedure for two operational amplifiers (OP-Amp) used in charge pumps (CP) is presented. Such procedure, which is from system-level specifications to circuit-level requirements, provides a general methodology for OP-Amp design in CP. The design was simulated in a 0.18μm CMOS process and occupies a layout area of about 200μm×100μm. The simulation results show that these two OP-Amps meets the specification under all CP´s switching conditions, while drawing only 640μA from a 1.8V supply.
Keywords
CMOS analogue integrated circuits; charge pump circuits; operational amplifiers; phase locked loops; CMOS process; PLL charge pump circuits; circuit-level requirements; current 640 muA; op-amp design; operational amplifiers; phase-locked loop; size 0.18 mum; system-level specifications; voltage 1.8 V; Bandwidth; Charge pumps; Layout; Operational amplifiers; Phase locked loops; Simulation; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-5797-7
Type
conf
DOI
10.1109/ICSICT.2010.5667665
Filename
5667665
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