A 15ns 1mb Cmos Sram

Author

Sasaki, K. ; Hanamura, S. ; Ueda, K. ; Oono, T. ; Minato, O. ; Nishimura, K. ; Sakai, Y. ; Meguro, S. ; Tsunematsu, M. ; Masuhara, T. ; Kubotera, M. ; Toyoshima, H.

Author_Institution

Hitachi Ltd., Tokyo, Japan

fYear

1988

Firstpage

174

Keywords

CMOS process; CMOS technology; Decoding; Gain control; MOS devices; Packaging; Random access memory; Space technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1988. Digest of Technical Papers. ISSCC. 1988 IEEE International

Conference_Location

San Francisco, CA, USA

Type

DOI

10.1109/ISSCC.1988.663685

Filename

663685

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