Title :
A built-in technique for probing power-supply noise distribution within large-scale digital integrated circuits
Author :
Okumoto, Takeshi ; Nagata, Makoto ; Taki, Kazuo
Author_Institution :
Dept. of Comput. & Syst. Eng., Kobe Univ., Japan
Abstract :
Noise detector circuits as compact as standard logic cells for being embedded within a high-density large-scale digital circuit enable in-depth characterization of dynamic power-supply and ground noises. Voltage drops at the locations of active cell rows within 1.8-V standard cell based digital circuits are consistently measured by 1.8-V and 2.5-V built-in detectors in a 0.18-μm CMOS triple well technology. Measurements show that the ground-noise distribution is distinctively more localized than the power-supply counterpart due to the presence of a substrate.
Keywords :
CMOS integrated circuits; integrated circuit design; integrated circuit noise; power supply circuits; 0.18 micron; 1.8 V; 2.5 V; CMOS triple well technology; ground noises; in-depth characterization; large-scale digital integrated circuits; noise detector circuits; power-supply noise distribution; CMOS logic circuits; CMOS technology; Detectors; Digital circuits; Digital integrated circuits; Integrated circuit noise; Large scale integration; Large-scale systems; Logic circuits; Voltage;
Conference_Titel :
VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8287-0
DOI :
10.1109/VLSIC.2004.1346517