DocumentCode :
1637784
Title :
An improved design of Si PNIN tunneling field effect transistor
Author :
Cao, W. ; Yao, C.J. ; Huang, D.M. ; Li, M.-F.
Author_Institution :
Dept. of Microelectron., Fudan Univ., Shanghai, China
fYear :
2010
Firstpage :
1808
Lastpage :
1810
Abstract :
PIN tunneling field effect transistor (TFET) is one of the most promising devices due to its low sub-threshold swing. In this paper, using TCAD simulation, we investigate the doping and structure dependence of the electric field in PIN TFET. We show that an insertion of a thin N layer into PIN structure (i.e., PNIN TFET) not only enhances the drive current but also improves the reliability of the device. We also show that the device characteristics can be further improved by properly aligning the gate electrodes with respect to the tunneling junction.
Keywords :
field effect transistors; p-i-n diodes; silicon; technology CAD (electronics); tunnelling; PIN tunneling field effect transistor; PNIN tunneling field effect transistor; Si; TCAD simulation; device reliability; doping; electric field; gate electrodes; structure dependence; tunneling junction; Doping; Electric fields; Junctions; Logic gates; Reliability; Semiconductor process modeling; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-5797-7
Type :
conf
DOI :
10.1109/ICSICT.2010.5667675
Filename :
5667675
Link To Document :
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