BiCMOS analog arbitration circuits

The authors describe a family of BiCMOS circuits for use in the sequence detection electronics of a magnetic recording channel. The discussion focuses on a class of analog BiCMOS circuits that implement the arbitration function. Several BiCMOS analog arbitration circuit topologies were evaluated. General design equations were derived for each topology in terms of power consumption. These equations were used to design circuits. The performance of these circuits was evaluated and compared to the predictions. Simulation and experimental results confirmed the design equations. The end result is a family of BiCMOS metric arbitration circuits for an analog implementation of a maximum likelihood sequence detection (MLSD) algorithm