Title :
Image morphological operations by neural circuits
Author :
Shih, Frank Y. ; Moh, Jenlong
Author_Institution :
Dept. of Comput. & Inf. Sci., New Jersey Inst. of Technol., Newark, NJ, USA
Abstract :
An approach to implementing neural computing with Boolean programmable logic is presented. A technique for the implementation of image morphological operations using a neural architecture is developed. Image morphological operations, by their very nature, involve repeated computations over large data structures. Parallelism appears to be a necessary attribute of a hardware system which can efficiently perform such image analysis tasks
Keywords :
Boolean functions; computerised picture processing; neural nets; parallel architectures; virtual machines; Boolean programmable logic; data structures; hardware system; image analysis tasks; image morphological operations; neural architecture; neural circuits; neural computing implementation; parallelism; repeated computations; Boolean functions; Circuits; Computer architecture; Data structures; Hardware; Image analysis; Morphological operations; Parallel processing; Programmable logic arrays; Programmable logic devices;
Conference_Titel :
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location :
Portland, OR
DOI :
10.1109/ISCAS.1989.100465
