DocumentCode :
1638136
Title :
Boolean function minimization based on Intel architecture
Author :
MIkhtonyuk, Sergey ; Davydov, Maksim ; Kuznetsov, Eugene ; Parfentiy, Alexander
fYear :
2008
Firstpage :
626
Lastpage :
629
Abstract :
This paper presents new quasi -optimal Boolean functions minimization method, adapted for parallel execution. The program based on this method is oriented on Intel multicore architecture and designed for significant reduction of instrument and time costs when implementing partially specified Boolean functions of large number of variables.
Keywords :
Boolean functions; computer architecture; minimisation; Intel multicore architecture; instrument reduction; parallel execution; quasi-optimal Boolean functions minimization method; time costs reduction; Boolean function minimization method; Intel multicore architecture; Quine -McCluskey method;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Modern Problems of Radio Engineering, Telecommunications and Computer Science, 2008 Proceedings of International Conference on
Conference_Location :
Lviv-Slavsko
Print_ISBN :
978-966-553-678-9
Type :
conf
Filename :
5423459
Link To Document :
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