Title :
Super self-aligned double-gate (SSDG) MOSFETs utilizing oxidation rate difference and selective epitaxy
Author :
Jong-Ho Lee ; Taraschi, G. ; Andy Wei ; Langdo, T.A. ; Fitzgerald, E.A. ; Antoniadis, D.A.
Author_Institution :
Microsystems Technol. Lab., MIT, Cambridge, MA, USA
Abstract :
We propose a new super self-aligned double-gate MOSFET structure to implement "ideal" double-gate CMOS devices. Only one gate mask is used to define both top and bottom gates, so a perfectly aligned gate structure is obtained. Oxidation rate difference and selective epitaxy are utilized and the process sequence is explained briefly. Device simulation results for the structure show high current level and good GIDL characteristics. Good experimental results are obtained in the key process steps to fabricate the structure.
Keywords :
CMOS integrated circuits; MOSFET; chemical vapour deposition; oxidation; semiconductor device models; vapour phase epitaxial growth; GIDL characteristics; SOI wafer; Si-SiO/sub 2/; bottom gate definition; device simulation; gate mask; high current level; ideal double-gate CMOS devices; oxidation rate difference; perfectly aligned gate structure; process sequence; selective epitaxy; super self-aligned double-gate MOSFETs; top gate definition; CMOS technology; Doping; Epitaxial growth; Etching; Fabrication; Laboratories; MOSFETs; Oxidation; Semiconductor films; Wafer bonding;
Conference_Titel :
Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-5410-9
DOI :
10.1109/IEDM.1999.823849
