Device reliability in analog CMOS applications

Author

Thewes, R. ; Brederlow, R. ; Schlunder, C. ; Wieczorek, P. ; Hesener, A. ; Ankele, B. ; Klein, P. ; Kessel, S. ; Weber, W.

Author_Institution

Infineon Technol., Munich, Germany

fYear

1999

Firstpage

81

Lastpage

84

Abstract

A comprehensive discussion is performed of MOSFET reliability under analog operation taking into account channel hot-carrier (CHC) stress, bias temperature (BT) instabilities, hard and soft breakdown and SILC. The conditions for the occurrence of these mechanisms and criteria for stress induced malfunction of analog circuits are discussed including the physics behind the behavior of typical analog device parameters after CHC and BT stress.

Keywords

CMOS analogue integrated circuits; MOSFET; circuit stability; hot carriers; leakage currents; operational amplifiers; semiconductor device breakdown; semiconductor device reliability; MOSFET reliability; SILC; analog CMOS applications; bias temperature instabilities; channel hot-carrier stress; degradation mechanisms; hard breakdown; soft breakdown; stress induced malfunction; two-stage operational amplifier; CMOS technology; Degradation; Digital circuits; Electric breakdown; Hot carriers; MOSFET circuits; Stress; Switching circuits; Temperature; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-5410-9

Type

conf

DOI

10.1109/IEDM.1999.823851

Filename

823851