DocumentCode :
1638279
Title :
Optimal design of a power ALDMOS transistor
Author :
Hidalgo, S. ; Berta, F. ; Rebollo, J. ; Millán, J.
Author_Institution :
CNM-CSIC, Univ. Autonoma de Barcelona, Spain
fYear :
1991
Firstpage :
103
Abstract :
The ALDMOS transistor is analyzed using two-dimensional simulations. For this device, it is shown that a drift region length shorter than that of the resurfed LDMOST is needed for a given breakdown voltage, this fact accounting for an additional reduction of the specific ON-resistance. Moreover, a comparison of this structure with the resurfed LDMOST and with the LIGBT is provided
Keywords :
insulated gate field effect transistors; power transistors; semiconductor device models; LIGBT; breakdown voltage; drift region length; optimal design; power ALDMOS transistor; resurfed LDMOST; specific ON-resistance; two-dimensional simulations; Analytical models; Breakdown voltage; Electrons; Logic circuits; Logic devices; Merging; Metallization; Numerical simulation; Substrates; Thyristors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrotechnical Conference, 1991. Proceedings., 6th Mediterranean
Conference_Location :
LJubljana
Print_ISBN :
0-87942-655-1
Type :
conf
DOI :
10.1109/MELCON.1991.161789
Filename :
161789
Link To Document :
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