DocumentCode
1638575
Title
2T1D memory cell with voltage gain
Author
Luk, Wing K. ; Dennard, Robert H.
Author_Institution
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
2004
Firstpage
184
Lastpage
187
Abstract
A 2T1D dynamic memory cell with two transistors (T) and a gated diode (D) is presented. The gated diode acts as a nonlinear capacitance which amplifies the internal stored voltage in a read operation, leading to high performance, higher S/N ratio, and low voltage operation. Details about the gated diode structure, its principle of operations, the memory cell circuits and the array structure are presented, followed by hardware results.
Keywords
CMOS integrated circuits; DRAM chips; VLSI; 2T1D memory cell; dynamic memory cell; gated diode; high performance; higher S/N ratio; internal stored voltage; low voltage operation; nonlinear capacitance; read operation; two transistors; voltage gain; CMOS memory circuits; Capacitance; Capacitors; Diodes; Dynamic voltage scaling; Hardware; Low voltage; Random access memory; Threshold voltage; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN
0-7803-8287-0
Type
conf
DOI
10.1109/VLSIC.2004.1346552
Filename
1346552
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